EPM9320ARI208-10N ApplicationField
-Wireless Technology
-Consumer Electronics
-Artificial Intelligence
-5G Technology
-Cloud Computing
-Medical Equipment
-Industrial Control
-Internet of Things
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ICs EPM9320ARI208-10N Features
High-performance CMOS EEPROM-based programmable logic devices (PLDs) built on
third-generation Multiple Array MatriX (MAX) architecture
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Xilinx EPM9320ARI208-10N Overview
The MAX 9000 family of in-system-programmable, high-density, highperformance
EPLDs is based on Altera’s third-generation MAX architecture. Fabricated on an
advanced CMOS technology, the EEPROMbased MAX 9000 EPM9320ARI208-10N provides 6,000 to
12,000 usable gates, pin-to-pin delays as fast as 10 ns, and counter speeds of
up to 144 MHz.
EPM9320ARI208-10N Tags integrated circuit
1. Altera MAX 9000 Devices development board
2. MAX 9000 Devices starter kit
3. Altera EPM9320A
4. EPM9320A development board
5. MAX 9000 Devices evaluation kit
6. EPM9320ARI208-10N Datasheet PDF
7. MAX 9000 Devices EPM9320A
8. EPM9320A evaluation board
9. EPM9320A development board
Xilinx EPM9320ARI208-10N TechnicalAttributes
-Delay Time tpd(1) Max 10.0ns
-Number of I/O 132
-Operating Temperature 0??C ~ 70??C (TA)
-Programmable Type In System Programmable
-Number of Gates 6000
-Supplier Device Package 208-RQFP (28×28)
-Number of Macrocells 320
-Package / Case 208-BFQFP Exposed Pad
-Voltage Supply – Internal 4.75V ~ 5.25V
-Mounting Type Surface Mount
-Number of Logic Elements/Blocks 20