Xilinx FPGA

Where to buy Xilinx XC3S700A-4FGG400I FPGA

Spartan-3A FPGA family’s is a group of 5 notable devices including XC3S50A, XC3S50A, XC3S400A, XC3S700A, and XC3S1400A. These devices are manufactured by XILINX. One of the notable family members of Spartan-3A is XC3S700A-4FGG400I. Body size of 4FGG484C package is 21 by 21 mm with maximum height is 2.43 mm. XC3S700A-4FGG400I devices are surface mounted having 400 pins. These devices are equipped with packaging tray type. Lead free option is also available in these devices. The XC3S700A4FGG400I device can tolerate moisture having maximum Moisture Sensitivity Level (MSL) up to 168 hours. The XC3S700A-4FGG400I device comes up with 469 I/O with 484 number of terminations and having ball type termination. These devices can operate in extreme temperature conditions ranging from -40 °C to 100 °C. Spartan-3A FPGA is a very economical ICs family with effective application range in different electronic applications.

XC3S700A-4FGG400I Properties:

 XC3S700A-4FGG400I devices come with Fine pitch Ball Grid Array also known as FBGA Array. These devices are made up of 4 banks having 5 GND pairs per bank. These are surface mounted devices with a pin count of 676. These devices are designed for 311 user I/O and 142 differential I/O (I/O and input-only pins). The XC3S700A-4FGG400I devices offer maximum I/O of 311 with 1.0 mm Lead Pitch having body height of 2.43 mm. XC3S700A family is designed with 700K system gates having 13,248 equivalent logic cells. Configurable Logic Array of this family consists of 48 rows and 32 columns with total 1,472 CLBs (one CLB is equal to 4 slices thus making 5,888 total slices). The device comes up with 72K Distributed RAM bits having 360K blocked RAM bits. These devices are equipped with 20 dedicated multipliers and equipped with Eight DCMs.

I/O Timings:

XC3S700A-4FGG400I devices are equipped with Pins T8, U7 and U16 which are movable from left device to right device without any condition. These devices have I/O distribution as 77, 79, 76 and 79 at top, right, bottom and left edge respectively with maximum I/O of 311.

Clock to Output timings of XC3S700A-4FGG400I devices are ranged from 3.39 ns to 3.50 ns Digital Clock Manager (DCM) usage. Similarly, these devices are equipped with output timings from 4.97 ns to 5.34 ns with no Digital Clock Manager usage. Digital Clock Manager jitter is included in all explained output timings.

Pin to Pin setup times for the IOB input path for XC3S700A-4FGG400I devices vary between 2.38 ns to 2.57 ns with Digital Clock Manager (DCM) usage and configured Input delay. While pin to pin setup times for the same device vary between 2.28 ns to 2.63 ns with no Digital Clock Manager (DCM) usage and with programmed input delay. Hold time for XC3S700A-4FGG400I devices vary between -0.17 ns to -0.12 ns when DCM is in use with no programmed input delay and Hold time ranges from -0.80 ns to -0.74 ns when no DCM is in use with programmed input delay.

Clock Timing:

All XC3S700A-4FGG400I devices has the frequency of TCK signal clocked at 0 MHz (minimum) to 20 MHz (maximum).

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