XC3S400AN-FGG400AGQ device belongs to the Spartan-3A FPGA Family. This family offers industry specific cutting-edge features such as diversified I/O protocols, soft processor, and high logic to pin ratios. Other devices belonging to this family are XC3S50A, XC3S200A, XC3S700A,and XC3S1400A. XC3S400AN-FGG400AGQ devices are effective in solving design challenges in electronic applications which are considered cost-responsive, high volume and enriched with I/O protocols. XC3S400AN-FGG400AGQ devices are part of extended Spartan-3A family which also covers non-volatile and high-density FPGAs. The new characteristics of Spartan-3A FPGA family can enhance system performance and effective in cost reduction of programming. XC3S400AN-FGG400AGQ devices are cost effective thus considered as a advanced alternative to masked configured ASICs.
XC3S400AN-FGG400AGQ Properties:
XC3S400AN-FGG400AGQ devices consist of 400 thousand system gates, 8,064 equivalent logic cells. Configurable Logic Control (CLB) array of such kind of devices includes 40 rows and 24 columns. XC3S400AN-FGG400AGQ contains 896 CLBs with each CLB consisting of 4 slices thus making total slices as 3,584. Distributed RAM bits of these devices are clocked at 56K with Block RAM bits of 56K. XC3S400AN-FGG400AGQ devices have 20 dedicated multipliers with 4 Digital Clock Managers (DCMs) having maximum user I/O at 311 and maximum differential I/O pairs at 142. Quiescent Supply Current Characteristics of these devices are 85 mA for commercial maximum and 125 mA for Industrial maximum for Quiescent VCCINT supply current. Quiescent VCCO supply current is clocked at 3 mA & 4 mA for commercial and industrial maximum respectively. While Quiescent VCCAUX supply current for these devices is 18 mA and 24 mA for commercial and industrial maximum respectively.
I/O Timings:
Clock to Output timings of XC3S400AN-FGG400AGQ devices ranges from 2.97 ns to 3.33ns when Digital Clock Manager (DCM) is in use. When Digital Clock Manager (DCM) is not in use the Clock to Output timing of these devices ranges from 4.68 ns to 5.12 ns. It is worth noting that DCM output jitter is included in all above measurements.
Pin to Pin setup times for the IOB input path for XC3S400AN-FGG400AGQ devices ranges from 2.38 ns to 2.68 ns when the Digital Clock Manager (DCM) is in use with no configured Input delay. While pin to pin setup times for the same device ranges from 2.21 ns to 2.60 ns when no Digital Clock Manager (DCM) is in use with no programmed input delay. On the other hand, Hold time for XC3S400AN-FGG400AGQ devices ranges from -0.33 ns to -0.29 ns when DCM is in use with no programmed input delay and Hold time clocked at -0.42 ns when no DCM is in use with programmed input delay.
Clock Timing:
All XC3S400AN-FGG400AGQ devices has the frequency of TCK signal clocked at 0 MHz (minimum) to 33 MHz (maximum).
Thermal Characteristics:
XC3S400AN-FGG400AGQ devices exhibit thermal resistance factor ranging from 8.4 °C/Watt to 9.8 °C/Watt (for Case to Junction) and 15.4 °C/Watt to 19.3 °C/Watt (for Junction to Board). While Junction to ambient thermal resistance ranges from 25.2 °C/Watt to 29.9 °C/Watt when air is still. The thermal resistance tends to go on lower side with increasing air flows from 250 LFM to 750 LFM.
