EP1AGX90EF1152I6N -Artificial Intelligence -Medical Equipment

EP1AGX90EF1152I6N ApplicationField

-Industrial Control
-Consumer Electronics
-Wireless Technology
-5G Technology
-Internet of Things
-Medical Equipment
-Cloud Computing
-Artificial Intelligence

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EP1AGX90EF1152I6N FAQ Chips 

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Q: Where can I purchase INTEL EP1AGX90E Development Boards, Evaluation Boards, or Arria GX FPGA Starter Kit? also provide technical information?
A: RAYPCB does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.

Q: How can I obtain software development tools related to the INTEL FPGA platform?
A: Quartus Prime Modelsim is the corresponding programming software for FPGA produced by Altera/Intel. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.

ICs EP1AGX90EF1152I6N Features

■ High-speed serial transceiver channels with CDR support up to 3.125 Gbps.
■ 8B/10B encoder/decoder performs 8-bit to 10-bit encoding and 10-bit to 8-bit decoding
■ Hot socketing feature for hot plug-in or hot swap and power sequencing support without the use of external devices
■ Devices available with 4, 8, or 12 high-speed full-duplex serial transceiver channels
(POS-PHY Level 4), SFI-4.1, XSBI, UTOPIA IV, NPSI, and CSIX-L1
The key features of Arria GX devices include:
■ 1.2- and 1.5-V pseudo current mode logic (PCML) support on transmitter output buffers
■ Receiver indicator for loss of signal (available only in PCI Express [PIPE] mode)
■ Support for source-synchronous bus standards, including SPI-4 Phase 2
■ Channel aligner compliant with XAUI
■ Support for numerous single-ended and differential I/O standards
■ Main device features:
■ Support for high-speed external memory including DDR and DDR2 SDRAM, and SDR SDRAM
■ High-speed source-synchronous differential I/O support on up to 47 channels
■ Phase compensation FIFO buffer performs clock domain translation between the transceiver block and the logic array
■ TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers with performance up to 380 MHz
■ Dedicated circuitry that is compliant with PIPE, XAUI, Gigabit Ethernet, Serial Digital Interface (SDI), and Serial RapidIO
■ Support for the following CDR-based bus standards—PCI Express, Gigabit Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO, along with the ability to develop proprietary, serial-based IP using its Basic mode
■ Transceiver block features
■ Individual transmitter and receiver channel power-down capability for reduced power consumption during non-operation
■ Support for multiple intellectual property megafunctions from Altera MegaCore functions and Altera Megafunction Partners Program (AMPPSM)
■ Up to four enhanced phase-locked loops (PLLs) per device provide spread spectrum, programmable bandwidth, clock switch-over, and advanced multiplication and phase shifting
■ High-speed DSP blocks provide dedicated implementation of multipliers, multiply-accumulate functions, and finite impulse response (FIR) filters
■ Up to 16 global clock networks with up to 32 regional clock networks per device
■ Support for remote configuration updates

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Xilinx EP1AGX90EF1152I6N Overview

The Arria GX family of devices combines 3.125 Gbps serial transceivers with reliable packaging technology and a proven logic array. Arria GX EP1AGX90EF1152I6N devices include 4 to 12 high-speed transceiver channels, each incorporating clock data recovery (CDR) technology and embedded SERDES circuitry designed to support PCI-Express, Gigabit Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO protocols, along with the ability to develop proprietary, serial-based IP using its Basic mode. The transceivers build upon the success of the Stratix II GX family. The Arria GX FPGA technology offers a 1.2-V logic array with the right level of performance and dependability needed to support these mainstream protocols.Arria GX EP1AGX90EF1152I6N devices incorporate up to 12 high-speed serial transceiver channels that build on the success of the Stratix II GX device family.Arria GX EP1AGX90EF1152I6N transceivers are structured into full-duplex (transmitter and receiver) four-channel groups called transceiver blocks located on the right side of the device. The transceiver blocks can be configured to support the following serial connectivity protocols (functional modes):    ■ PCI Express (PIPE)■ Gigabit Ethernet (GIGE)■ XAUI■ Basic (600 Mbps to 3.125 Gbps)■ SDI (HD, 3G)■ Serial RapidIO (1.25 Gbps, 2.5 Gbps, 3.125 Gbps)Transceivers within each block are independent and have their own set of dividers. Therefore, each transceiver can operate at different frequencies.Each block can select from two reference clocks to provide two clock domains that each transceiver can select from.
The INTEL Embedded – FPGAs (Field Programmable Gate Array) series EP1AGX90EF1152I6N is FPGA – Field Programmable Gate Array FPGA – Arria GX 4511 LABs 538 IOs, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
and you can also search for other FPGAs products.

EP1AGX90EF1152I6N Tags integrated circuit

1. EP1AGX90E evaluation board
2. Arria GX evaluation kit
3. EP1AGX90E reference design
5. INTEL Arria GX development board
6. Arria GX EP1AGX90E
7. EP1AGX90E development board
8. Arria GX starter kit

Xilinx EP1AGX90EF1152I6N TechnicalAttributes

-Maximum Operating Frequency 622.08 MHz
-Mounting Style SMD/SMT
-Distributed RAM 4.4 Mbit
-Number of I/Os 538
-Operating Supply Current 0.62 A
-Packaging Tray
-Number of Logic Blocks 4511
-Operating Supply Voltage 1.2 V to 3.3 V
-Minimum Operating Temperature – 40℃
-Package / Case FBGA-1152

-Series Arria GX

-Maximum Operating Temperature + 85℃

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