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EP1SGX10CF672C6N FAQ Chips
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Q: How can I obtain software development tools related to the INTEL FPGA platform?
A: Quartus Prime Modelsim is the corresponding programming software for FPGA produced by Altera/Intel. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
ICs EP1SGX10CF672C6N Features
● Support for transceiver-based protocols, including 10 Gigabit Ethernet attachment unit interface (XAUI), Gigabit Ethernet (GigE), and SONET/SDH
● Compatible with PCI Express, SMPTE 292M, Fibre Channel, and Serial RapidIO I/O standards
● Individual transmitter and receiver channel power-down capability implemented automatically by the Quartus II software for reduced power consumption during non-operation
● 1.5-V pseudo current mode logic (PCML) for 500 Mbps to 3.1875 Gbps
● High-speed serial transceiver channels with CDR provides 500-megabits per second (Mbps) to 3.1875-Gbps full-duplex operation
■ Transceiver block features are as follows:
● Programmable differential output voltage (VOD), pre-emphasis, and equalization settings for improved signal integrity
● Built-in self test (BIST)
● Programmable transceiver-to-FPGA interface with support for 8-, 10-, 16-, and 20-bit wide data paths
● Hot insertion/removal protection circuitry
● Devices are available with 4, 8, 16, or 20 high-speed serial transceiver channels providing up to 127.5 Gbps of full-duplex serial bandwidth
● Support for LVDS, LVPECL, and 3.3-V PCML on reference clocks and receiver input pins (AC-coupled)
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Xilinx EP1SGX10CF672C6N Overview
The Stratix GX family of devices is Altera’s second FPGA family to combine high-speed serial transceivers with a scalable, high-performance logic array. Stratix GX devices include 4 to 20 high-speed transceiver channels, each incorporating clock data recovery (CDR) technology and embedded SERDES capability at data rates of up to 3.1875 gigabits per second (Gbps). These transceivers are grouped by four-channel transceiver blocks, and are designed for low power consumption and small die size. The Stratix GX EP1SGX10CF672C6N FPGA technology is built upon the Stratix architecture, and offers a 1.5-V logic array with unmatched performance, flexibility, and time-to-market capabilities. This scalable, high-performance architecture makes Stratix GX devices ideal for high-speed backplane interface, chip-to-chip, and communications protocol-bridging applications.
The INTEL Embedded – FPGAs (Field Programmable Gate Array) series EP1SGX10CF672C6N is FPGA Stratix GX Family 10570 Cells 5000MHz 130nm Technology 1.5V 672-Pin FC-FBGA, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
and you can also search for other FPGAs products.
EP1SGX10CF672C6N Tags integrated circuit
1. Stratix GX evaluation kit
2. EP1SGX10 reference design
3. EP1SGX10CF672C6N Datasheet PDF
4. EP1SGX10 development board
5. Stratix GX EP1SGX10
6. INTEL EP1SGX10
7. Stratix GX starter kit
8. EP1SGX10 evaluation board
9. EP1SGX10 development board
Xilinx EP1SGX10CF672C6N TechnicalAttributes
-Number of Logic Blocks 1057
-Distributed RAM 920 kbit
-Package / Case FBGA-672
-Maximum Operating Frequency 650 MHz
-Number of I/Os 362
-Series Stratix GX
-Operating Supply Voltage 1.5 V to 3.3 V
-Minimum Operating Temperature 0 C
-Maximum Operating Temperature + 70 C
-Mounting Style SMD/SMT