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EPM7256SQC208-7N FAQ Chips
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ICs EPM7256SQC208-7N Features
■ High-performance 2.5-V CMOS EEPROM-based programmable logic devices (PLDs)
built on second-generation Multiple Array MatriX (MAX) architecture (see Table
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Xilinx EPM7256SQC208-7N Overview
MAX EPM7256SQC208-7N devices are high-density, high-performance devices based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000B EPM7256SQC208-7N operate with a 2.5-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 3.5 ns, and counter speeds up to 303.0 MHz.
The INTEL Embedded – CPLDs (Complex Programmable Logic Devices) series EPM7256SQC208-7N is CPLD MAX 7000S Family 5K Gates 256 Macro Cells 128.2MHz CMOS Technology 5V 208Pin PQFP, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
and you can also search for other FPGAs products.
EPM7256SQC208-7N Tags integrated circuit
1. MAX 7000 EPM7256S
2. EPM7256S reference design
3. MAX 7000 starter kit
4. EPM7256S evaluation board
5. INTEL EPM7256S
6. MAX 7000 evaluation kit
7. EPM7256SQC208-7N Datasheet PDF
8. EPM7256S development board
9. EPM7256S evaluation board
Xilinx EPM7256SQC208-7N TechnicalAttributes
-Maximum Operating Frequency 172.4 MHz
-Mounting Style SMD/SMT
-Delay Time 5.5 ns
-Supply Voltage – Max 3.6 V
-Minimum Operating Temperature 0 C
-Number of Macrocells 256
-Memory Type EEPROM
-Operating Supply Voltage 3.3 V
-Package / Case PQFP-208
-Number of Programmable I/Os 164
-Supply Voltage – Min 3 V
-Series MAX 7000
-Maximum Operating Temperature + 70 C