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EPM9320BC356-15 FAQ Chips
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ICs EPM9320BC356-15 Features
High-performance CMOS EEPROM-based programmable logic devices (PLDs) built on
third-generation Multiple Array MatriX (MAX) architecture
Request EPM9320BC356-15 FPGA Quote, Pls Send Email to Sales@hillmancurtis.com Now
Xilinx EPM9320BC356-15 Overview
The MAX 9000 family of in-system-programmable, high-density, high performance
EPLDs is based on Altera’s third-generation MAX architecture. Fabricated on an
advanced CMOS technology, the EEPROMbased MAX EPM9320BC356-15 provides 6,000 to
12,000 usable gates, pin-to-pin delays as fast as 10 ns, and counter speeds of
up to 144 MHz.
The Altera Connectors series EPM9320BC356-15 is Male H4 Cable Connector For 2, 5mm² Dual Certified, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
and you can also search for other FPGAs products.
EPM9320BC356-15 Tags integrated circuit
1. EPM9320BC356-15 Datasheet PDF
2. EPM9320 reference design
3. MAX 9000 Devices evaluation kit
4. EPM9320 evaluation board
5. MAX 9000 Devices EPM9320
6. Altera MAX 9000 Devices development board
7. Altera EPM9320
8. EPM9320 development board
9. EPM9320 evaluation board
Xilinx EPM9320BC356-15 TechnicalAttributes
-Operating Temperature 0??C ~ 70??C (TA)
-Number of I/O 132
-Mounting Type Surface Mount
-Supplier Device Package 208-RQFP (28×28)
-Voltage Supply – Internal 4.75V ~ 5.25V
-Number of Logic Elements/Blocks 20
-Number of Gates 6000
-Programmable Type In System Programmable
-Delay Time tpd(1) Max 10.0ns
-Package / Case 208-BFQFP Exposed Pad
-Number of Macrocells 320