L-ASC10-1SG48IAMJ ApplicationField
-Consumer Electronics
-Medical Equipment
-Cloud Computing
-Artificial Intelligence
-Wireless Technology
-Internet of Things
-5G Technology
-Industrial Control
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L-ASC10-1SG48IAMJ FAQ Chips
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ICs L-ASC10-1SG48IAMJ Features
Ten Rail Voltage Monitoring and Measurement
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Xilinx L-ASC10-1SG48IAMJ Overview
The L-ASC10-1SG48IAMJ (Analog Sense and Control – 10 rail) is a Hardware Management
(Power, Thermal, and Control Plane Management) Expander designed to be used with
Platform Manager 2, MachXO2, MachXO3, or ECP5 FPGAs to implement the Hardware
Management Control function in a circuit board. The L-ASC10-1SG48IAMJ (referred to as ASC)
enables seamless scaling of power supply voltage and current monitoring,
temperature monitoring, sequence and margin control channels. The ASC includes
dedicated interfaces supporting the exchange of monitor signal status and output
control signals with these centralized hardware management controllers. Up to
eight ASC devices can be used to implement a hardware management system.
The ASC
provides three types of analog sense channels: voltage (nine standard channels
and one high voltage channel), current (one standard voltage and one high
voltage), and temperature (two external and one internal) .
Each of the analog sense channels is monitored through two independently
programmable comparators to support both high/low and in-bounds/out-of-bounds
(window-compare) monitor functions. The current sense channels feature a
programmable gain amplifier and a fast fault detect (<1 µs response time) for
detecting short circuit events. The temperature sense channels can be configured
to work with different external transistor or diode configurations.
Nine general
purpose 5 V tolerant open-drain digital input/ output pins are provided that can
be used in a system for controlling DC-DC converters, low-drop-out regulators
(LDOs) and optocouplers, as well as for supervisory and general purpose logic
interface functions. Four high-voltage charge pumped outputs (HVOUT1-HVOUT4) may
be configured as high-voltage MOSFET drivers to control high-side MOSFET
switches. These HVOUT outputs can also be programmed as static output signals or
as switched outputs (to support external charge pump implementation) operating
at a dedicated duty cycle and frequency.
The ASC device incorporates four TRIM
outputs for controlling the output voltages of DC-DC converters. Each power
supply output voltage can be maintained typically within 0.5% tolerance across
various load conditions using the Digital Closed Loop Control mode.
The internal
10-bit A/D converter can be used to monitor the voltage and current through the
I2 C bus. The ADC is also used in the digital closed loop control mode of the
trimming block.
The ASC also provides the capability of logging up to 16 status records into
the on-chip nonvolatile EEPROM memory. Each record includes voltage, current and
temperature monitor signals along with digital input and output levels.
The
dedicated ASC Interface (ASC-I/F) is a reliable serial channel used to
communicate with a Platform Manager 2, MachXO2, MachXO3, or ECP5 FPGA in a
scalable star topology. The centralized control algorithm in the FPGA monitors
signal status and controls output behavior via this ASC-I/F. The ASC I2 C
interface is used by the FPGA or an external microcontroller for ASC background
programming, interface configuration, and additional data transfer such as
parameter measurement or I/O control or status. For example, voltage trim
targets can be set over the I2 C bus and measured voltage, current, or
temperature values can be read over the I2 C bus.
The ASC also includes an
on-chip output control block (OCB) which allows certain alarms and control
signals a direct connection to the GPIOs or HVOUTs, bypassing the ASC-I/F for a
faster response. The OCB is used to connect the fast current fault detect signal
to an FPGA input directly. It also supports functions like Hot Swap with a
programmable hysteretic controller.
L-ASC10-1SG48IAMJ Tags integrated circuit
1. L-ASC10 development board
2. L-ASC10 evaluation board
3. L-ASC10 L-ASC10
4. L-ASC10-1SG48IAMJ Datasheet PDF
5. L-ASC10 starter kit
6. Lattice L-ASC10
7. L-ASC10 reference design
8. L-ASC10 evaluation kit
9. L-ASC10-1SG48IAMJ Datasheet PDF
Xilinx L-ASC10-1SG48IAMJ TechnicalAttributes
