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XC7Z020-L1CLG484I FAQ Chips
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ICs XC7Z020-L1CLG484I Features
• Supports LVCMOS, LVDS, and SSTL
Programmable I/O Blocks
36 Kb Block RAM
• True Dual-Port
• 1.2V to 3.3V I/O
• 18 x 25 signed multiply
• Up to 72 bits wide
• Programmable I/O delay and SerDes
• Configurable as dual 18 Kb block RAM
• Cascadeable adders
• Look-up tables (LUT)
• 25-bit pre-adder
• 48-bit adder/accumulator
Request XC7Z020-L1CLG484I FPGA Quote, Pls Send Email to Sales@hillmancurtis.com Now
Xilinx XC7Z020-L1CLG484I Overview
Please note this product is Non-Cancellable and Non-Returnable (NCNR)
XC7Z020-L1CLG484I Tags integrated circuit
1. Xilinx Zynq-7000 SoC development board
2. Zynq-7000 SoC evaluation kit
3. Zynq-7000 SoC starter kit
4. Zynq-7000 SoC XC7Z020
5. Xilinx XC7Z020
6. XC7Z020 evaluation board
7. XC7Z020 reference design
8. XC7Z020-L1CLG484I Datasheet PDF
9. Zynq-7000 SoC XC7Z020
Xilinx XC7Z020-L1CLG484I TechnicalAttributes
-Architecture MCU, FPGA
-Package / Case 484-LFBGA, CSPBGA
-Operating Temperature -40℃ ~ 100℃ (TJ)
-Core Processor Dual ARM? Cortex?-A9 MPCore? with CoreSight?
-RAM Size 256KB
-Supplier Device Package 484-CSPBGA (19×19)
-Primary Attributes Artix?-7 FPGA, 85K Logic Cells
-Connectivity CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG