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XC95108-10PQ160I FAQ Chips
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ICs XC95108-10PQ160I Features
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Xilinx XC95108-10PQ160I Overview
The XC95108-10PQ160I is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of eight
36V18 Function Blocks, providing 2,400 usable gates with
propagation delays of 7.5 ns.
Power dissipation can be reduced in the XC95108-10PQ160I by configuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize power dissipation.
Operating current for each design can be approximated for specific operating conditions using the following equation:
ICC (mA) = MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f
MCHP = Macrocells in high-performance mode
MCLP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
XC95108-10PQ160I Tags integrated circuit
1. XC95108-10PQ160I Datasheet PDF
2. In-System Programmable CPLD starter kit
3. XC95108 evaluation board
4. In-System Programmable CPLD XC95108
5. Xilinx XC95108
6. In-System Programmable CPLD evaluation kit
7. Xilinx In-System Programmable CPLD development board
8. XC95108 reference design
9. In-System Programmable CPLD XC95108
Xilinx XC95108-10PQ160I TechnicalAttributes
-Package / Case 160-BQFP
-Mounting Type Surface Mount
-Voltage Supply – Internal 4.5V ~ 5.5V
-Number of Gates 2400
-Operating Temperature -40℃ ~ 85℃ (TA)
-Number of Macrocells 108
-Number of Logic Elements/Blocks 6
-Delay Time tpd(1) Max 10.0ns
-Number of I/O 108
-Supplier Device Package 160-PQFP (28×28)
-Programmable Type In System Programmable (min 10K program/erase cycles)