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XC95108-20PQG100I FAQ Chips
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ICs XC95108-20PQG100I Features
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Xilinx XC95108-20PQG100I Overview
The XC95108-20PQG100I is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of eight
36V18 Function Blocks, providing 2,400 usable gates with
propagation delays of 7.5 ns.
Power dissipation can be reduced in the XC95108-20PQG100I by configuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize power dissipation.
Operating current for each design can be approximated for specific operating conditions using the following equation:
ICC (mA) = MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f
MCHP = Macrocells in high-performance mode
MCLP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
XC95108-20PQG100I Tags integrated circuit
1. Xilinx In-System Programmable CPLD development board
2. XC95108 evaluation board
3. Xilinx XC95108
4. XC95108 development board
5. In-System Programmable CPLD XC95108
6. XC95108 reference design
7. In-System Programmable CPLD starter kit
8. In-System Programmable CPLD evaluation kit
9. XC95108 development board
Xilinx XC95108-20PQG100I TechnicalAttributes