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XC95108-20TQG100C FAQ Chips
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ICs XC95108-20TQG100C Features
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Xilinx XC95108-20TQG100C Overview
The XC95108-20TQG100C is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of eight
36V18 Function Blocks, providing 2,400 usable gates with
propagation delays of 7.5 ns.
Power dissipation can be reduced in the XC95108-20TQG100C by configuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize power dissipation.
Operating current for each design can be approximated for specific operating conditions using the following equation:
ICC (mA) = MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f
MCHP = Macrocells in high-performance mode
MCLP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
XC95108-20TQG100C Tags integrated circuit
1. XC95108 reference design
2. XC95108 development board
3. XC95108 evaluation board
4. In-System Programmable CPLD starter kit
5. Xilinx In-System Programmable CPLD development board
6. In-System Programmable CPLD XC95108
7. Xilinx XC95108
8. In-System Programmable CPLD evaluation kit
9. In-System Programmable CPLD starter kit
Xilinx XC95108-20TQG100C TechnicalAttributes
-Operating Temperature 0℃ ~ 70℃ (TA)
-Supplier Device Package 100-TQFP (14×14)
-Number of Gates 2400
-Package / Case 100-LQFP
-Programmable Type In System Programmable (min 10K program/erase cycles)
-Mounting Type Surface Mount
-Number of Logic Elements/Blocks 6
-Number of Macrocells 108
-Delay Time tpd(1) Max 20.0ns
-Voltage Supply – Internal 4.75V ~ 5.25V
-Number of I/O 81