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XCR3064XL-10VQ44C FAQ Chips
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ICs XCR3064XL-10VQ44C Features
Programmable slew rate control per macrocell
5V tolerant I/O pins with 3.3V core supply
Advanced 0.35 micron five layer metal EEPROM process
5.5 ns pin-to-pin logic delays
44-pin VQFP (36 user I/O pins)
3.3V PCI electrical specification compatible outputs (no internal clamp diode on any input or I/O, no minimum clock input capacitance)
Refer to XPLA3 family data sheet (DS012) for architecture description
System frequencies up to 192 MHz
Full IEEE Standard 1149.1 boundary-scan (JTAG)
Available in small footprint packages44-pin VQFP (36 user I/O pins)48-ball CS BGA (40 user I/O pins)56-ball CP BGA (48 user I/O pins)100-pin VQFP (68 user I/O pins)
Eight product term control terms per function block
Up to 23 available clocks per function block
100-pin VQFP (68 user I/O pins)
Port Enable pin for dual function of JTAG ISP pins
Ultra-low power operation
Typical Standby Current of 17 μA at 25°C
Security bit prevents unauthorized access
Fast Zero Power CMOS design technology
Four global clocks
Excellent pin retention during design changes
Predictable timing model
2.7V to 3.6V supply voltage at industrial temperature range
56-ball CP BGA (48 user I/O pins)
Advanced system featuresIn-system programmingInput registersPredictable timing modelUp to 23 available clocks per function blockExcellent pin retention during design changesFull IEEE Standard 1149.1 boundary-scan (JTAG)Four global clocksEight product term control terms per function block
Optimized for 3.3V systemsUltra-low power operationTypical Standby Current of 17 μA at 25°C5V tolerant I/O pins with 3.3V core supplyAdvanced 0.35 micron five layer metal EEPROM processFast Zero Power CMOS design technology3.3V PCI electrical specification compatible outputs (no internal clamp diode on any input or I/O, no minimum clock input capacitance)
48-ball CS BGA (40 user I/O pins)
Low power 3.3V 64 macrocell CPLD
Fast ISP programming times
64 macrocells with 1,500 usable gates
Request XCR3064XL-10VQ44C FPGA Quote, Pls Send Email to Sales@hillmancurtis.com Now
Xilinx XCR3064XL-10VQ44C Overview
The CoolRunner™ XPLA3 XCR3064XL-10VQ44C device is a 3.3V,
64-macrocell CPLD targeted at power sensitive designs
that require leading edge programmable logic solutions. A
total of four function blocks provide 1,500 usable gates.
Pin-to-pin propagation delays are as fast as 5.5 ns with a
maximum system frequency of 192 MHz.
• Low power 3.3V 64 macrocell CPLD
• 5.5 ns pin-to-pin logic delays
• System frequencies up to 192 MHz
• 64 macrocells with 1,500 usable gates
• Available in small footprint packages
– 44-pin VQFP (36 user I/O pins)
– 48-ball CS BGA (40 user I/O pins)
– 56-ball CP BGA (48 user I/O pins)
– 100-pin VQFP (68 user I/O pins)
• Optimized for 3.3V systems
– Ultra-low power operation
– Typical Standby Current of 17 μA at 25°C
– 5V tolerant I/O pins with 3.3V core supply
– Advanced 0.35 micron five layer metal EEPROM
– Fast Zero Power CMOS design technology
– 3.3V PCI electrical specification compatible
outputs (no internal clamp diode on any input or
I/O, no minimum clock input capacitance)
• Advanced system features
– In-system programming
– Input registers
– Predictable timing model
– Up to 23 available clocks per function block
– Excellent pin retention during design changes
– Full IEEE Standard 1149.1 boundary-scan (JTAG)
– Four global clocks
– Eight product term control terms per function block
• Fast ISP programming times
• Port Enable pin for dual function of JTAG ISP pins
• 2.7V to 3.6V supply voltage at industrial temperature
• Programmable slew rate control per macrocell
• Security bit prevents unauthorized access
The Xilinx Programmable logic array series XCR3064XL-10VQ44C is XCR3064XL 64 Macrocell CPLD COMPLEX-EEPLD, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
and you can also search for other FPGAs products.
XCR3064XL-10VQ44C Tags integrated circuit
1. Xilinx XCR3064XL
2. XCR3064XL reference design
3. XCR3064XL evaluation board
4. Xilinx Macrocell CPLD development board
5. XCR3064XL-10VQ44C Datasheet PDF
6. Macrocell CPLD XCR3064XL
7. Macrocell CPLD evaluation kit
8. Macrocell CPLD starter kit
9. Xilinx Macrocell CPLD development board
Xilinx XCR3064XL-10VQ44C TechnicalAttributes
-Supply Voltage (DC) 3.30 V
-Mounting Style Surface Mount
-Product Lifecycle Status Active
-ECCN Code EAR99
-Lead-Free Status Contains Lead
-Number of I/O Pins 36