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EP1SGX10DF672C6N FAQ Chips
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Q: How can I obtain software development tools related to the INTEL FPGA platform?
A: Quartus Prime Modelsim is the corresponding programming software for FPGA produced by Altera/Intel. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
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ICs EP1SGX10DF672C6N Features
● Programmable differential output voltage (VOD), pre-emphasis, and equalization settings for improved signal integrity
● Individual transmitter and receiver channel power-down capability implemented automatically by the Quartus II software for reduced power consumption during non-operation
● 1.5-V pseudo current mode logic (PCML) for 500 Mbps to 3.1875 Gbps
● Programmable transceiver-to-FPGA interface with support for 8-, 10-, 16-, and 20-bit wide data paths
● Built-in self test (BIST)
■ Transceiver block features are as follows:
● Hot insertion/removal protection circuitry
● Support for LVDS, LVPECL, and 3.3-V PCML on reference clocks and receiver input pins (AC-coupled)
● Compatible with PCI Express, SMPTE 292M, Fibre Channel, and Serial RapidIO I/O standards
● Devices are available with 4, 8, 16, or 20 high-speed serial transceiver channels providing up to 127.5 Gbps of full-duplex serial bandwidth
● High-speed serial transceiver channels with CDR provides 500-megabits per second (Mbps) to 3.1875-Gbps full-duplex operation
● Support for transceiver-based protocols, including 10 Gigabit Ethernet attachment unit interface (XAUI), Gigabit Ethernet (GigE), and SONET/SDH
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Xilinx EP1SGX10DF672C6N Overview
The Stratix GX family of devices is Altera’s second FPGA family to combine high-speed serial transceivers with a scalable, high-performance logic array. Stratix GX devices include 4 to 20 high-speed transceiver channels, each incorporating clock data recovery (CDR) technology and embedded SERDES capability at data rates of up to 3.1875 gigabits per second (Gbps). These transceivers are grouped by four-channel transceiver blocks, and are designed for low power consumption and small die size. The Stratix GX EP1SGX10DF672C6N FPGA technology is built upon the Stratix architecture, and offers a 1.5-V logic array with unmatched performance, flexibility, and time-to-market capabilities. This scalable, high-performance architecture makes Stratix GX devices ideal for high-speed backplane interface, chip-to-chip, and communications protocol-bridging applications.
The INTEL Embedded – FPGAs (Field Programmable Gate Array) series EP1SGX10DF672C6N is FPGA – Field Programmable Gate Array FPGA – Stratix I GX 1057 LABs 362 IOs, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
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EP1SGX10DF672C6N Tags integrated circuit
1. EP1SGX10 development board
2. INTEL Stratix GX development board
3. Stratix GX evaluation kit
4. Stratix GX EP1SGX10
5. EP1SGX10 reference design
6. EP1SGX10DF672C6N Datasheet PDF
7. INTEL EP1SGX10
8. EP1SGX10 evaluation board
9. Stratix GX EP1SGX10
Xilinx EP1SGX10DF672C6N TechnicalAttributes
-Mounting Style SMD/SMT
-Maximum Operating Temperature + 70 C
-Operating Supply Voltage 1.5 V to 3.3 V
-Maximum Operating Frequency 650 MHz
-Number of I/Os 362
-Package / Case FBGA-672
-Series Stratix GX
-Number of Logic Blocks 1057
-Minimum Operating Temperature 0 C
-Distributed RAM 920 kbit