ISPPAC-POWR604-01T44C ApplicationField
-5G Technology
-Consumer Electronics
-Industrial Control
-Medical Equipment
-Artificial Intelligence
-Wireless Technology
-Internet of Things
-Cloud Computing
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ISPPAC-POWR604-01T44C FAQ Chips
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ICs ISPPAC-POWR604-01T44C Features
■ Monitor and Control Multiple Power Supplies
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Xilinx ISPPAC-POWR604-01T44C Overview
The Lattice ispPAC-POWR604 incorporates both insystem programmable logic and
in-system programmable analog circuits to perform special functions for power
supply sequencing and monitoring. The ispPACPOWR604 device has the capability to
be configured through software to control up to four outputs for power supply
sequencing and six comparators monitoring supply voltage limits, along with four
digital inputs for interfacing to other control circuits or digital logic. Once
configured, the design is downloaded into the device through a standard JTAG
interface. The circuit configuration and routing are stored in non-volatile E2
CMOS. PAC-Designer, an easy-to-use Windows-compatible software package, gives
users the ability to design the logic and sequences that control the power
supplies or regulator circuits. The user has control over timing functions,
programmable logic functions and comparator threshold values as well as I/O
configurations.
The ispPAC-POWR604 device is specifically designed as a fully-programmable
power supply sequencing controller and monitor for managing up to four separate
power supplies, as well as monitoring up to six analog inputs or supplies. The
ispPAC-POWR604 device contains an internal PLD that is programmable by the user
to implement digital logic functions and control state machines. The internal
PLD connects to two programmable timers, special purpose I/O and the
programmable monitoring circuit blocks. The internal PLD and timers can be
clocked by either an internal programmable clock oscillator or an external clock
source.
The voltage monitors are arranged as six independent comparators each
with 192 programmable trip point settings. Monitoring levels are set around the
following standard voltages: 1.2V, 1.5V, 1.8V, 2.5V, 3.3V or 5.0V.
All six
voltages can be monitored simultaneously (i.e., continuous-time operation).
Other non-standard voltage levels can be accounted for using various scale
factors.
For added robustness, the comparators feature a variable hysteresis
that scales with the voltage they monitor. Generally, a larger hysteresis is
better. However, as power supply voltages get smaller, that hysteresis
increasingly affects trip-point accuracy. Therefore, the hysteresis is +/-16mV
for 5V supplies and scales down to +/-3mV for 1.2V supplies, or about 0.3% of
the trip point.
The programmable logic functions consist of a block of 20 inputs
with 41 product terms and eight macrocells. The architecture supports the
sharing of product terms to enhance the overall usability. The four output pins
are open-drain outputs. These outputs can be used to drive enable lines for
DC/DC converters or other control logic associated with power supply control.
The four outputs are driven from the macrocells.
ISPPAC-POWR604-01T44C Tags integrated circuit
1. ispPAC-POWR evaluation kit
2. ISPPAC-POWR604 evaluation board
3. ispPAC-POWR ISPPAC-POWR604
4. ISPPAC-POWR604 reference design
5. ISPPAC-POWR604-01T44C Datasheet PDF
6. Lattice ispPAC-POWR development board
7. ISPPAC-POWR604 development board
8. Lattice ISPPAC-POWR604
9. ISPPAC-POWR604 reference design
Xilinx ISPPAC-POWR604-01T44C TechnicalAttributes