LCMXO2-640HC-6SG48C ApplicationField
-Internet of Things
-Artificial Intelligence
-Medical Equipment
-5G Technology
-Industrial Control
-Consumer Electronics
-Cloud Computing
-Wireless Technology
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LCMXO2-640HC-6SG48C FAQ Chips
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ICs LCMXO2-640HC-6SG48C Features
Flexible Logic Architecture
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Xilinx LCMXO2-640HC-6SG48C Overview
The MachXO2 family of ultra low power, instant-on, non-volatile PLDs has six devices with densities ranging from
256 to 6864 Look-Up Tables (LUTs). In addition to LUT-based, low-cost programmable logic these devices feature
Embedded Block RAM (EBR), Distributed RAM, User Flash Memory (UFM), Phase Locked Loops (PLLs), preengineered source synchronous I/O support, advanced configuration support including dual-boot capability and
hardened versions of commonly used functions such as SPI controller, I2
C controller and timer/counter. These features allow these devices to be used in low cost, high volume consumer and system applications.
The MachXO2 devices are designed on a 65nm non-volatile low power process. The device architecture has several features such as programmable low swing differential I/Os and the ability to turn off I/O banks, on-chip PLLs and oscillators dynamically. These features help manage static and dynamic power consumption resulting in low
static power for all members of the family.
The MachXO2 devices are available in two versions – ultra low power (ZE) and high performance (HC and HE)
devices. The ultra low power devices are offered in three speed grades -1, -2 and -3, with -3 being the fastest. Similarly, the high-performance devices are offered in three speed grades: -4, -5 and -6, with -6 being the fastest. HC
devices have an internal linear voltage regulator which supports external VCC supply voltages of 3.3V or 2.5V. ZE
and HE devices only accept 1.2V as the external VCC supply voltage. With the exception of power supply voltage
all three types of devices (ZE, HC and HE) are functionally compatible and pin compatible with each other.
The MachXO2 PLDs are available in a broad range of advanced halogen-free packages ranging from the space
saving 2.5×2.5 mm WLCSP to the 23×23 mm fpBGA. MachXO2 devices support density migration within the same
package. Table 1-1 shows the LUT densities, package and I/O options, along with other key parameters.
The pre-engineered source synchronous logic implemented in the MachXO2 device family supports a broad range
of interface standards, including LPDDR, DDR, DDR2 and 7:1 gearing for display I/Os.
The MachXO2 devices offer enhanced I/O features such as drive strength control, slew rate control, PCI compatibility, bus-keeper latches, pull-up resistors, pull-down resistors, open drain outputs and hot socketing. Pull-up, pulldown and bus-keeper features are controllable on a “per-pin” basis.
A user-programmable internal oscillator is included in MachXO2 devices. The clock output from this oscillator may
be divided by the timer/counter for use as clock input in functions such as LED control, key-board scanner and similar state machines.
The MachXO2 devices also provide flexible, reliable and secure configuration from on-chip Flash memory. These
devices can also configure themselves from external SPI Flash or be configured by an external master through the
JTAG test access port or through the I2
C port. Additionally, MachXO2 devices support dual-boot capability (using
external Flash memory) and remote field upgrade (TransFR) capability.
The Lattice Embedded – FPGAs (Field Programmable Gate Array) series LCMXO2-640HC-6SG48C is IC FPGA 40 I/O 48QFN, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
and you can also search for other FPGAs products.
LCMXO2-640HC-6SG48C Tags integrated circuit
1. LCMXO2-640 evaluation board
2. MachXO2 evaluation kit
3. LCMXO2-640HC-6SG48C Datasheet PDF
4. MachXO2 LCMXO2-640
5. LCMXO2-640 reference design
6. Lattice LCMXO2-640
7. LCMXO2-640 development board
8. Lattice MachXO2 development board
9. MachXO2 LCMXO2-640
Xilinx LCMXO2-640HC-6SG48C TechnicalAttributes
-Voltage – Supply 2.375V ~ 3.465V
-Number of I/O 40
-Number of LABs/CLBs 80
-Number of Logic Elements/Cells 640
-Operating Temperature 0℃ ~ 85℃ (TJ)
-Supplier Device Package 48-QFN (7×7)
-Mounting Type Surface Mount
-Total RAM Bits 18432
-Package / Case 48-VFQFN Exposed Pad
