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XA9536XL-15VQG44I FAQ Chips
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ICs XA9536XL-15VQG44I Features
Input hysteresis on all user and boundary-scan pin inputs to reduce noise on input signals
Fast concurrent programming
Guaranteed to meet full electrical specifications over TA = -40° C to +105° C with TJ Maximum = +125° C (Q-grade)
Technology: 0.35 μm CMOS process
Superior pin-locking and routability with FastCONNECT™ II switch matrix allowing for multiple design iterations without board re-spins
Available in small footprint packages
Optimized for high-performance 3.3V systems5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals — ideal for multi-voltage system interfacing and level shiftingTechnology: 0.35 μm CMOS process
Full IEEE Standard 1149.1 boundary-scan (JTAG) for in-system device testingFast concurrent programming
Refer to XC9500XL Family data sheet (DS054) for architecture description
5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals — ideal for multi-voltage system interfacing and level shifting
Slew rate control on individual outputs for reducing EMI generation
System frequency up to 64.5 MHz (15.5 ns)
Refer to XA9536XL data sheet (DS598), the XA9572XL data sheet (DS599), and the XA95144XL data sheet (DS600) for pin tables
In-system programmable enabling higher system reliability through reduced handling and reducing production programming times
Xilinx received ISO/TS 16949 Certification in March 2005.
Advanced system featuresIn-system programmable enabling higher system reliability through reduced handling and reducing production programming timesSuperior pin-locking and routability with FastCONNECT™ II switch matrix allowing for multiple design iterations without board re-spinsInput hysteresis on all user and boundary-scan pin inputs to reduce noise on input signalsBus-hold circuitry on all user pin inputs which reduces cost associated with pull-up resistors and reduces bus loadingFull IEEE Standard 1149.1 boundary-scan (JTAG) for in-system device testingFast concurrent programming
AEC-Q100 device qualification and full PPAP support available in both extended temperature Q-grade and I-grade.
Bus-hold circuitry on all user pin inputs which reduces cost associated with pull-up resistors and reduces bus loading
Request XA9536XL-15VQG44I FPGA Quote, Pls Send Email to Sales@hillmancurtis.com Now
Xilinx XA9536XL-15VQG44I Overview
The XA9500XL 3.3V CPLD Automotive XA product family is targeted for leading-edge, high-performance automotive applications that require either automotive industrial (–40°C to +85°C ambient) or extended (–40°C to +105°C ambient) temperature reconfigurable devices.
The Xilinx CPLDs series XA9536XL-15VQG44I is CPLD XA9500XL Family 800Gates 36 Macro Cells 64.5MHz 0.35um (CMOS) Technology 3.3V 44Pin VTQFP, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
and you can also search for other FPGAs products.
XA9536XL-15VQG44I Tags integrated circuit
1. XA9536XL evaluation board
2. XA9500XL Automotive CPLD starter kit
3. XA9536XL-15VQG44I Datasheet PDF
4. XA9500XL Automotive CPLD evaluation kit
5. XA9536XL reference design
6. XA9500XL Automotive CPLD XA9536XL
7. Xilinx XA9536XL
8. XA9536XL development board
9. XA9500XL Automotive CPLD evaluation kit
Xilinx XA9536XL-15VQG44I TechnicalAttributes
-Operating Temperature -40℃ ~ 85℃ (TA)
-Package / Case 44-TQFP
-Programmable Type In System Programmable
-Mounting Type Surface Mount
-Number of Logic Elements/Blocks 2
-Voltage Supply – Internal 3V ~ 3.6V
-Number of Gates 800
-Number of Macrocells 36
-Supplier Device Package 44-VQFP (10×10)
-Delay Time tpd(1) Max 15.5ns
-Number of I/O 34