XA9572XL-15VQG64Q ApplicationField
-Artificial Intelligence
-5G Technology
-Wireless Technology
-Cloud Computing
-Consumer Electronics
-Industrial Control
-Medical Equipment
-Internet of Things
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ICs XA9572XL-15VQG64Q Features
Refer to XC9500XL Family data sheet (DS054) for architecture description
Available in small footprint packages
System frequency up to 64.5 MHz (15.5 ns)
Input hysteresis on all user and boundary-scan pin inputs to reduce noise on input signals
Slew rate control on individual outputs for reducing EMI generation
Superior pin-locking and routability with FastCONNECT™ II switch matrix allowing for multiple design iterations without board re-spins
Optimized for high-performance 3.3V systems5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals — ideal for multi-voltage system interfacing and level shiftingTechnology: 0.35 μm CMOS process
Guaranteed to meet full electrical specifications over TA = -40° C to +105° C with TJ Maximum = +125° C (Q-grade)
5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals — ideal for multi-voltage system interfacing and level shifting
Advanced system featuresIn-system programmable enabling higher system reliability through reduced handling and reducing production programming timesSuperior pin-locking and routability with FastCONNECT™ II switch matrix allowing for multiple design iterations without board re-spinsInput hysteresis on all user and boundary-scan pin inputs to reduce noise on input signalsBus-hold circuitry on all user pin inputs which reduces cost associated with pull-up resistors and reduces bus loadingFull IEEE Standard 1149.1 boundary-scan (JTAG) for in-system device testingFast concurrent programming
Bus-hold circuitry on all user pin inputs which reduces cost associated with pull-up resistors and reduces bus loading
In-system programmable enabling higher system reliability through reduced handling and reducing production programming times
Refer to XA9536XL data sheet (DS598), the XA9572XL data sheet (DS599), and the XA95144XL data sheet (DS600) for pin tables
Full IEEE Standard 1149.1 boundary-scan (JTAG) for in-system device testingFast concurrent programming
Technology: 0.35 μm CMOS process
AEC-Q100 device qualification and full PPAP support available in both extended temperature Q-grade and I-grade.
Fast concurrent programming
Xilinx received ISO/TS 16949 Certification in March 2005.
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Xilinx XA9572XL-15VQG64Q Overview
The XA9500XL 3.3V CPLD Automotive XA product family is targeted for leading-edge, high-performance automotive applications that require either automotive industrial (–40°C to +85°C ambient) or extended (–40°C to +105°C ambient) temperature reconfigurable devices.
The Xilinx CPLDs series XA9572XL-15VQG64Q is CPLD XA9500XL Family 1.6K Gates 72 Macro Cells 64.5MHz 0.35um (CMOS) Technology 3.3V 64Pin VTQFP, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at RAYPCB.com,
and you can also search for other FPGAs products.
XA9572XL-15VQG64Q Tags integrated circuit
1. XA9572XL-15VQG64Q Datasheet PDF
2. XA9500XL Automotive CPLD XA9572XL
3. XA9572XL evaluation board
4. XA9500XL Automotive CPLD starter kit
5. XA9500XL Automotive CPLD evaluation kit
6. XA9572XL development board
7. Xilinx XA9572XL
8. XA9572XL reference design
9. XA9500XL Automotive CPLD starter kit
Xilinx XA9572XL-15VQG64Q TechnicalAttributes
-Mounting Type Surface Mount
-Package / Case 64-TQFP
-Number of Macrocells 72
-Operating Temperature -40℃ ~ 105℃ (TA)
-Voltage Supply – Internal 3V ~ 3.6V
-Number of I/O 52
-Delay Time tpd(1) Max 15.5ns
-Number of Gates 1600
-Number of Logic Elements/Blocks 4
-Supplier Device Package 64-VQFP (10×10)
-Programmable Type In System Programmable